Integrated optics is a technology which enables new applications in a variety of application areas and is as such one of the Key Enabling Technologies (KET) within the roadmap of Europe. Handling signals-on-chip in the photonics domain has advantages, and a number of standard platforms have been developed in the last years each with their pros and cons.
Besides InP and SOI the TriPleX™ technology of LioniX is one of the three main platforms in Europe. The TriPleX™ technology is applicable in a broad range of applications due to large transparency window and its low propagation loss. The material system is transparent from 405 nm to 2.35 µm which allows applications ranging from biochemistry to telecoms. In the biochemistry (microreactors, point of care diagnostics, lab-on-a-chip, etc.) in particular the combination of the waveguide technology with mircofluidics (creating and optofluidics platform) is of key importance, and sensing principles like fluorescence detection, absorption and refractive index change measurements can be implemented.
Examples of telecoms applications can be found in routing and filtering in a variety of telecom networks, but also in delay lines and photonic signal manipulation in Micro Wave Photonic applications. All applications can be based on the same technology building blocks and only by changing the geometry of the waveguide different variations can be realized (see Figure 1 below).
The building block approach is also reflected strongly in the design kit that has been realized to allow users to design on system level in the waveguide technology. The design kit follows the same design philosophy as standard implemented in the electronics industry. An electronics designer is very often not aware of the exact details of for instance a capacitor or resistance in his circuit. With design kits he/she is however able to design complete complex circuits with the functional behaviour of the components. The design kit also allows the processing of devices in Multi Project Wafer (MPW) runs in which multiple users share the cost of processing a full batch of wafers by combining their designs on a single run.